Analog-to-digital converters (ADCs) convert data from analog to digital form. ADCs are necessary in many applications. For example, information collected from analog phenomena such as sound and light can be digitized and made available for digital processing. Users of ADCs typically impose strict and sometimes conflicting requirements. For example, such requirements can include a high sampling rate, low latency, low power, low cost, etc.
One conventional solution is to use flash converters, which can provide fast conversion and lowest latency. However, a problem with conventional flash converters is that they achieve these objectives at a high cost. For example, conventional flash converters perform with low precision and consume very large amounts of power. Also, conventional flash converters have a limited input range, linearity problems, and difficulties in achieving high resolutions. Yet another drawback is that conventional flash converters require large silicon areas, which make them expensive to manufacture.
Successive approximation converters perform with higher precision and usually lower power than conventional flash converters. However, the conversion process of successive approximation converters provides an increased latency. Another problem with successive approximation converters is that the signal must be stored and processed for several cycles. This requires either accurate analog matching or decimation of input samples. Also, each converter must be designed for a specific set of applications and operating conditions, because successive approximation converters cannot be easily tuned.
Another conventional solution is using serial and delta-sigma converters. They can be very precise through a feedback error correction process. These architectures are very versatile, can easily adjust to surrounding conditions, and can be very accurate. However, a problem with these architectures is that the feedback process can take a long time. Consequently, the conversion rate is very slow. As a result, applications requiring medium and high sampling rates cannot use these architectures.
Accordingly, what is needed is an improved ADC. The ADC should achieve a high sampling rate and low latency, have low-power consumption, and should be simple, cost effective, and capable of being easily adapted to existing technology. The present invention addresses such a need.